Add the MIGraphX rung for AMD GPUs
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Measured on a Radeon RX 7900 XT against Arch's onnxruntime-rocm 1.29 (docs/inference.md §1.3): MIGraphX fp16 runs the detectors at 2.4–3.4 ms against 10–58 ms on the CPU provider, the inpainter at 8 ms against 514, with a 15–135 s compile per graph the first time and under a second from its cache after. A compiling rung on TensorRT's terms, wired the same way. The ROCm execution provider is gone (removed in ONNX Runtime 1.23), so the AMD ladder is MIGraphX then the CPU, with no non-compiling rung between. MIGraphX is registered through the runtime's generic key/value entry point rather than ort's builder: 1.29 reads the legacy options struct for its precision flags only, and the compiled-program cache directory (`migraphx_model_cache_dir`) only travels the generic way. The provider's cache key omits the precision, so f32 and fp16 programs get their own directories. The probe fingerprint now includes the provider libraries beside the runtime and the ROCm version, since a distribution's CPU and ROCm builds are the same file at the same path. `status().failed` reports only the rungs above the selection, so an AMD desktop's About line says why MIGraphX won rather than that the NVIDIA providers are not in the build. Two examples: `ep_probe` times each provider cold and from cache, and `ladder` drives `init` as the app does to watch the first-run sequence. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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@@ -83,10 +83,65 @@ fn providers(
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ep::CUDA::default().build(),
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])?)
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}
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Rung::MiGraphX => {
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// fp16 on the same terms as TensorRT (§7). MIGraphX compiles a
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// program per graph — 20–60 s here — and keeps it in the cache
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// directory, keyed on the graph, the GPU and its own version
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// but not the precision: hence one directory per precision.
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// The CPU takes any node it declines.
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let fp16 = role != Role::Embedder;
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let cache = cfg
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.cache_dir
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.join("migraphx")
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.join(if fp16 { "fp16" } else { "f32" });
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let _ = std::fs::create_dir_all(&cache);
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let mut b = b;
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migraphx(&mut b, fp16, &cache)?;
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Ok(b)
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}
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Rung::Hexagon => unreachable!("the Hexagon rung is not on a desktop ladder"),
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}
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}
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/// Register MIGraphX through ONNX Runtime's generic key/value entry point.
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///
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/// `ort`'s own builder (`ep::MIGraphX`) fills the legacy
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/// `OrtMIGraphXProviderOptions`, and 1.29 reads that struct for its
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/// precision flags and nothing else — the compiled-program cache directory
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/// is only a key in the generic map (`migraphx_model_cache_dir`), and
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/// without it every session is a full compile. Registration through the
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/// generic entry point needs no `ort` feature: it is one call on the API
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/// table, which is why the crate's `ort` dependency names no AMD feature.
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#[cfg(not(target_os = "android"))]
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fn migraphx(
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b: &mut ort::session::builder::SessionBuilder,
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fp16: bool,
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cache: &std::path::Path,
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) -> ort::Result<()> {
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use ort::AsPointer;
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use std::ffi::CString;
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let keys = [c"migraphx_fp16_enable", c"migraphx_model_cache_dir"];
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let values = [
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CString::new(if fp16 { "1" } else { "0" }).unwrap(),
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CString::new(cache.to_string_lossy().as_bytes())
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.map_err(|e| ort::Error::new(e.to_string()))?,
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];
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let key_ptrs: Vec<_> = keys.iter().map(|k| k.as_ptr()).collect();
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let value_ptrs: Vec<_> = values.iter().map(|v| v.as_ptr()).collect();
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// SAFETY: the documented C call over arrays that outlive it; the
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// runtime copies the strings into its own options map before returning.
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unsafe {
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let status = (ort::api().SessionOptionsAppendExecutionProvider)(
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b.ptr_mut(),
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c"MIGraphX".as_ptr(),
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key_ptrs.as_ptr(),
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value_ptrs.as_ptr(),
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keys.len(),
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);
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ort::Error::result_from_status(status)
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}
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}
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#[cfg(target_os = "android")]
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fn providers(
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b: ort::session::builder::SessionBuilder,
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@@ -120,6 +175,8 @@ fn providers(
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.build()
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.error_on_failure()])?)
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}
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Rung::Cuda | Rung::TensorRt => unreachable!("no NVIDIA rung on Android"),
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Rung::Cuda | Rung::TensorRt | Rung::MiGraphX => {
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unreachable!("no desktop GPU rung on Android")
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}
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}
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}
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